Cadence design tools are used extensively in our analog and digital integrated circuit engineering classes. Students enrolled in the Signals Processing and Electronics track are required to take the Integrated Circuit Engineering (ECE345) class in the Spring Semester of their junior year. 

The Integrated Circuit Engineering laboratory contains state-of-the-art computer-aided design (CAD) tools, computer platforms and their peripherals for the design of Very Large Scale Integration (VLSI) circuits. Integrated circuits, comprising from 20 to 20,000 transistors are designed from the bottom up using industry standard layout and simulation tools. Cadence Design Systems make their tools available at a massive discount through their educational program. 

The Integrated Circuit Design Experience

Students undertake three design exercises using the Cadence suite and related commercial process design kits through three EE courses (EE241 Microelectronics I, ECE342 Microelectronics II and ECE345 Integrated Circuit Engineering). The circuits and system design through Senior Projects (ECE395 & ECE396) are sometimes fabricated through Taiwan Semiconductor Manufacturing Company (TSMC) via MUSE Semiconductor Inc. service or through SkyWater Technology.

The first design exercise is the final project of Microelectronics I (EE241). Students study fundamentals of circuit and CMOS devices before working on their final project, designing bias circuits and single stage amplifier to meet a set of specifications, principally regarding voltage gain and power consumption. Students are introduced to Cadence’s Virtuoso through a short demo and then use it in this and subsequent projects. 
The second, more advanced, design exercise is the final project of Microelectronics II (EE342) taken the next semester. EE342 introduces more complicated circuits and techniques. In addition, physical layout is covered so students consider more realistic constraints when they design. The final project, therefore, requires finishing layout in addition to design and simulation. Examples of layouts done by graduate students and the professor are shown in advance to help students from floor planning to efficient ways of routing. Students have their first experience of doing layout and understand the entire flow of design.

The third experience occurs in Integrated Circuit Engineering (EE345), a project-based course. It covers system level designs such as PLL, Oscillator and Multi-stage Operational Amplifiers. More advanced topics such as Miller effect, frequency stability and Thermal/Flicker noise are studied in this course. Students already have experience of layout from EE342 so they consider the size of the CMOS device and reasonable values for resistors and capacitors. After finishing layout, students are required to clear DRC and LVS errors so their layout becomes more feasible to fabricate.
In senior year some Senior Project teams work for tape-out to fabricate their own chip. The students choose their own topic, but they are generally either RF/Analog circuits such as RF wireless receiver design for Bluetooth (2.4GHz) or WiFi (5GHz) applications or Mixed-mode circuits such as Analog PLL, All-digital PLL (ADPLL) or Analog-to-Digital Converters (ADC). The Cooper Electrical Engineering department supports tape-out and discusses technology to manufacture. Department has several CMOS technology PDKs (28nm/65nm/130nm/180nm). Based on student’s target specification, appropriate technology is chosen, and final design layout are sent to either MUSE Semiconductor Inc. or SkyWater Technology. 

Integrated Circuit Engineering (ECE345)

Students entering this class are equipped with an understanding of the fundamental building blocks of analog integrated circuits and a thorough comprehension of frequency response and feedback. Focussing on analog design, the assignments for this class comprise a series of design exercises in which circuits are designed and laid out from the transistor level up. The first major circuit is an operational amplifier, chosen to bring together feedback, frequency response and blocks of transistors as circuit components. The other major exercise is a self-contained, four-bit, flash analog to digital converter.

Integrated circuit fabrication and technology. Device modeling, thermal effects. VLSI CAD design tools. Circuit layout, extraction and simulation. Design and analysis of multistage MOS operational amplifiers, OTA architectures. Nonlinear circuits, comparators. Analog switches. Sample and hold circuits. Bandgap reference circuits. MOS digital circuit design and layout, hierarchical approaches. Final design project is a mixed analog/digital circuit, e.g., flash A/D converter.

Digital Integrated Circuit Engineering (ECE441)

Design of CMOS combinational logic gates, layout and simulation. Standard cell construction. State machines. Complex gate design- AOI, XOR, flip-flops. Sequential logic systems, clocks. Design of arithmetic building blocks, multipliers, memory, FPGAs. System design and HDLs. Floor-planning. System architecture. Term project to design and fabricate of an ASIC using a variety of VLSI CAD tools.